Milestones

2023

• listing and trading on Taiwan Emerging Stock Market on December 5,2023
• First public release take effect on September 26, 2023
• Capital at par value increase to NT$ 457M
• “Japan Kyushu-Taiwan Semiconductor Exchange Delegation” visit CMSC to exchange views on IC design service development and collaboration

2022

• Tape out an automotive highly integrated interior LED lighting ASIC project
• Sign a memorandum of cooperation with College of Information and Electrical Enginnering, Feng Chia University to promote industry-iniversity collaboration and talents cultivation

2021

• Tape out an AI special opearand processor project used 12nm technology
• Tape out an automotive AI SoC design project for a Japan customer
• Sign a memorandum of cooperation with Providence University to promote industry-iniversity collaboration and talents cultivation
• Join TSIA (Taiwan Semiconductor Industry Association)

2020

• Tape out a 12nm project

2019

• Tape out 28nm/22nm projects
• Penetrate to the automotive field

2018

• Tape out a factory automotion ASIC-3 design project for a Japan customer
• Increase facility space for business growth
• CMSC official website of new revision is on the line

2017

• Tape out an information security SoC design project for a Korea customer

2016

• Tape out a factory automotion ASIC-2 design project for a Japan customer

2015

• Tape out a multimedia SoC design project, with high complexity used in a professional camera, for a Japan customer

2014

• Tape out a factory automotion ASIC-1 design project for a Japan customer

2013

• First 40nm project tape out

2012

• Tape out an SSD SoC design project for a Japan customer
• Tape out an ASIC design of ultra low noise analog front-end project for a Japan customer

2011

• Launched SiP design service

2010

• Tape out a 55nm project
• Increase facility space for business growth

2009

• “R&D project in Smart Microwave Sensor and RF SoC Product”received R&D subsidy from “Leading New Product Development Project”of Bureau of Industry, Ministry of Economic Affairs

2008

• Capital at par value increase to NT$ 397M

2007

• Get ISO9001 certification
• Qualified by Fujitsu as its design service partner

2006

• First 65nm project tape out
• Capital at par value increased to NT$ 297M
• Qualified by ARM as its approved design center

2005

• First 90nm project tape out
• Completes a 180nm ASIC design service for a Japanese IDM

2004

• Sign an agreement with MIPS as its authorized design partner
• Capital at par value increase to NT$ 227M
• Deliver the most competitive RISC CPU hard core to MIPS
• “Development project in DDR II 500 MHz registered buffer”received R&D subsidy from “Innovation Award”of Hsinchu Science Park Bureau

2003

• Approved to register in and move to Hsin-chu Science Park
• Invite strategic investors (VIS & CIDC) to restructure CMSC (total Cadence shares thus transfered to VIS & CIDC)

2001

• A design service company, 100% founded by Cadence Design Systems Inc. and located in Taiwan